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I n our everyday life, we use different types of audio indicators such as a doorbell to inform that someone is waiting at the door step, a telephone ring to inform that some one is calling, the alarm in the digital clock to wake up at a particular time, a beeper in the keyboard to confirm the key is pressed or not, and a buzzer in the washing machine to announce that washing is completed. But all these audio indicators are used for a particular function and cannot be easily put to use for other jobs.
An all-in-one multipurpose alarm circuit is described here. It finds multiple applications from a simple game, water level monitor, to volt- age alarm, to continuity tester, to security alarm. It gives continuous and interrupted alarms which can be activated by both high and low level pulse in the trigger mode and a high level voltage in the normal mode.
For testing diodes, test the continuity as mentioned earlier and once again test it interchanging the probes. If the alarm sounds on both tests, it means diode is shorted, and no sound implies diode is open, and a sound for any one of the tests confirms diode is good. In the same way, test a transistor. Touch the base with one probe and with the other probe, the collector and then emitter. Interchange the probes and test once again.
running of the pump are: 1. The mains supply should be within certain ‘low’ and ‘high’ cut-off limits (say between 200V AC and 250V AC). 2. The water level in the sump (ground tank) is above certain optimum level (2' in Fig. 1). 3. Water in the over- head tank (OHT) is be- low the minimum level. Once all the above- mentioned three condi- tions are satisfied, the pump motor would start running. The correspond- ing logic level at point A will be low (point B will also be low automati- cally—not being in touch with the liquid), point C will also be low and point D will be high. Once running, the pump will continue to run even when the water rises above the mini- mum level in the OHT (i.e. when point A sub- sequently goes high), provided the first condi- tion is still fully satisfied and the water level in the sump has not fallen below that of sensor 1'. It will stop only when ei- ther the maximum speci- fied level in the OHT has been reached or the water level in the sump has fallen below sensor 1' position. Here the NOR gate pairs of N2 and N3, and N6 and N7, form NOR-latches. When the ground tank (sump) water level is above the defined level 2', the voltage at pin 11 of gate N6 is low. So diode D12 cannot conduct. Also, if the mains voltage is within acceptable limits of 200-250V, the voltage at output pin 3 of gate N12 is high and the voltage at collector of transistor T2 is low. Diodes D8 and D11 are thus cut off. So the voltage at input pin 8 of gate N4 is pulled down to logic low level by passive pull-down resistor R18 (56 kilo-ohm).
Anumber of construction projects as well as circuit ideas for water-/fluid-level control have appeared in EFY over the years, but so far no dedicated project has appeared for automating the control of submersible water pumps. Looking into the demand for such a project from readers, we present here a circuit for automating the operation of an electrical submersible pump (ESP) based on the minimum and the maximum levels in the overhead tank (OHT). This circuit can be interfaced to the existing manual control panel of an ESP and can also be used as a standalone system after minor additions. ESP basics Electrical submersible pumps are single- or multiple- stage radial-flow pressure series impeller pumps that are close coupled to the motor for low and medium heads. These find applications in domestic, industrial, irrigation, air-conditioning, and various other systems. The ESPs are classified by the bore diameter (which generally varies from 100 mm to 200 mm), horse- power (from about 0.5 HP to 40 HP), and discharge rate (typically 120 litres per minute for 0.5 HP to about 2000 litres per minute for 40 HP). These are run at a fixed speed, which is 2850 rpm typically. The ESP body is made of cast iron or stainless steel. For low and medium range, one can use 3-phase or split-phase (also referred to as 2-phase) supply. ESPs of 3 HP or higher rating invariably use 3-phase supply. Let us consider a typical case of 1.5HP ESP with 100mm bore diameter, using a split- phase motor. The motor draws a running current of 10 to 11 amp, while the starting current is around 2.5 to three times the running current value. To obtain a higher initial torque, the run winding is connected in series with a paral- lel combination of 120- Fig. 1: Line diagram of control panel for manual operation of ESP motor 150μF, 230V AC bipolar Truth Table for relay operat ion Water level Relay operation (2.5 – 3 sec.) Pump motor in tank RL1 (stop) RL2 (Start) operation Below low level No Yes Starts Above low level but below high level No No Remains on Reaches high level Yes No Stops Motor rating Start capacitor value (μF) in HP 230V AC (working) 275V AC (surge) 1/6 20-25 1/5 30-40 1/4 40-60 1/3 60-80 1/2 80-100 3/4 100-120 1 120-150 11⁄2 150-200 2 200-250 K.C. Bhasin Simple Projects 87 Fig. 2: Circuit diagram for automatic control of ESP motor via control panel (Fig. 1) paper electrolytic capacitor and 72μF, 440V AC run-mode capacitor. After two or three seconds of running, when the motor has picked up sufficient speed, the start capacitor goes out of the circuit because of the opening of the centrifugal switch inside the motor, while the run capacitor stays in the circuit permanently. For ESPs that don’t have an integral centrifugal switch arrangement, a dual-section start switch (explained later) can be used to perform the function of the centrifugal switch. For the split-phase motor, the run capacitor value can be calculated using the simple thumb rule (70 μF per HP), while the start capacitor value may be determined from Table I. Manual operation of ESP motor (Fig. 1). The control panel comprises an isolator switch, push-to-on single-/ dual-section ‘start’ button, push-to-off ‘stop’ button, a triple-pole moulded case circuit breaker (MCCB) for motor protection with magnetic trip and reset- ting facility (with an adjustable current range of 12 to 25 amperes), start and run capacitors, ampere-meter, voltmeter, neon indicators, etc. (Note. The MCCBs used for motor control are termed as motor circuit protectors (MCPs). These Fig. 3: Actual-size, single-sided PCB layout for Fig. 2 88 Simple Projects are classified/catalogued by number of poles, continuous ampere rating, and magnetic trip range (current). For details, you may visit Cutler-Hammer’s Website or contact Bhartia Cuttler-Hammer dealers.) Fig. 1 shows a simplified control panel diagram, along with ESP motor wiring. The ‘start’ pushbutton (green), which is normally open, and the ‘stop’ pushbutton (red), which is normally closed, are in series with the live or phase line. The isolator switch is normally in ‘on’ position. When ‘start’ button is momentarily pressed, the contactor energises via the closed contacts of ‘off ’ button. One of the contact pairs of the contactor is used as the hold contact to shunt ‘on’ button and provide a parallel path to the contactor coil, which thus latches. The supply to the motor gets completed via the other N/O contacts of the contactor and the pump motor starts. When the motor gains sufficient speed (around 80 per cent of the normal running speed), the centrifugal switch opens to take the start capacitor out of the circuit and only the run capacitors (2x36 μF) permanently stay in series with one of the two stator windings of the ESP motor. In case the ESP is not provided with an integral centrifugal switch, a second section in ‘start’ button (shown in light shade in Fig. 1) can be used to shunt points ‘E’ and ‘F’. Since this switch section has no hold on contacts, the start capacitor will go out of circuit as soon as ‘start’ button is released. The motor can be switched off by momentarily depression of ‘off ’ button, which interrupts the supply to the contactor coil. To interface the control circuit shown in Fig. 2, we use circled points A and B (in parallel with ‘on’ button) and C and D (formed by disconnecting one of the wires going to ‘off ’ button terminal, i.e. in series with ‘off ’ button). Points E and F will be used if the ESP does not have an integral centrifugal switch. It may be recalled, by referring to Fig. 1 of the project ‘Auto Con- trol for 3-phase Motor’ published in EP Vol. 22, that wiring of ‘on’ and ‘off ’ buttons of 3-phase (4-wire system) and split-phase motors are identical. Hence the control circuit described here can equally be used for 3-phase motors of up to about 10 HP. For motors
I n applications like power stations and continuous process control plants, a protection system is used to trip faulty systems to prevent damages and ensure the overall safety of the personnel and machinery. But this often results in multiple or cascade tripping of a number of subunits. Looking at all the tripped units doesn’t reveal the cause of failure. It is therefore very important to determine the sequence of events that have occurred in order to exactly trace out the cause of failure and revive the system with minimal loss of time. The circuit presented here stores the tripping sequence in a system with up to eight units/blocks. It uses an auxiliary relay contact point in each unit that closes whenever tripping of the corresponding unit occurs. Such contact points can be identified easily, especially in systems using programmable logic control- lers (PLCs). This circuit records tripping of up to eight units and displays the order in which they tripped. A clock circuit, however fast, cannot be employed in this circuit because the clock period itself will be a limiting factor for sensing the incidence of fault. Besides, it may also mask a number of events that might have occurred during the period when the clock was low. Hence the events themselves are used as clock signals in this circuit. Fig. 1: Block diagram of tripping sequence recorder-cum-indicator Parts List Semiconductors: IC1, IC2 - CD4043 quad NOR RS latch IC3 - CD4510 BCD up-/down-counter IC 4-IC 11 - CD4511 BCD-to-7-segment latch/ decoder/driver T1-T11 - BC547 npn transistor T12-T19 - BC557 pnp transistor D1-D16 - 1N4007 rectifier diode DIS1-DIS8 - LT543 common-cathode 7-segment display Resistors (all 1⁄4-watt, ±5% carbon, unless stated otherwise): R1-R11, R13-R38 - 10-kilo-ohm R12, R39-R46- 1-kilo-ohm R47-R102 - 470-ohm Capacitors: C1-C8 - 0.01μF ceramic disk Miscellaneous: S1-S8 - Push-to-on switch or relay contacts (N/O) S9 - Push-to-on switch PZ1 - Piezobuzzer - 12V, 500mA power supply r.g. thiagraj kumar and s. ramaswamy Simple Projects 91 Fig. 1 shows the block diagram of the tripping sequence recorder-cum-indicator. The inputs derived from aux- iliary relay contacts (N/O) of subunits or push-to-on switches are latched by RS flip-flops when the corresponding subunits trip, causing the following four actions: 1. The latch outputs are ORed to activate audio alarm. 2. The latch outputs are differentiated individually and then ORed to provide clock pulses to the counter to increment the output of the counter that is initially preset at 1 (decimal). 3. Each individual latch output activates the associated latch/decoder/driver and 7-segment display set to display the number held at the output of the counter, which, in fact, indicates the total number of trips that have taken place since the last presetting. 4. LEDs associated with each of the latch, decoder, and driver sets remain lit to indicate the readiness of the sets to receive the tripping input. LEDs associated with the tripped unit go off. The circuit IC1 and IC 2 (CD4043) Quad NOR RS flip-flops in Fig. 2 are used to capture and store the information pertain- ing to the tripping of individual units. Reset pins of all the eight flip-flops and sub-parallel enable (PE) pin 1 of BCD up-/down-counter CD4510 (IC3) are returned to ground via 10-kilo-ohm resistor R22, while set pins of all RS flip-flops are returned to ground via individual 10-kilo-ohm resistors R14 through R21. Fig. 2: Schematic diagram of tripping sequence recorder-cum-indicator 92 Simple Projects Initially, all the eight Q outputs of IC1 and IC2 are at logic 0. The auxiliary relay contacts of the subunits, which are depicted here by push- to-on switches S1 through S8, connect the set terminal of the corresponding stage of RS flip-flop to +12V whenever tripping of a specific subunit oc- curs. This makes the output of the associated flip- flop go high. Thus whenever a sequence of tripping of subunits occurs, the corresponding outputs (1Q to 8Q) go high in the order of the tripping of the associated subunits. All the eight Q outputs are connected to the corresponding latch-enable inputs of BCD latch-cum-decoder-driver ICs (CD4511). These Q outputs are also ORed using diodes D1 through D8 to activate an audible alarm and also routed to a set of differentiator networks (comprising capaci- tors C1 through C8 and resistors R2 through R9). A differentiator provides a sharp pulse cor- responding to the tripping of a subunit. All such differentiated pulses are ORed via diodes D9 through D16 and coupled to the counter stage formed by IC3 (CD4510, a synchronous up-/ down-counter with preset) after amplification and pulse shaping by transistor amplifier stages built around transistors T2 and T3. These pulses serve as clock to count the number of trippings that oc- curred after a reset. Operation Let us assume that three units, say, E, H, and A (fifth, eighth, and first), tripped in that order fol- lowing a fault. When the system is reset (before any tripping), the outputs of all RS flip-flops (1Q through 8Q) are low. This LE* active-low makes latches IC4 through IC11 transparent and as the counter is preset to 1 (since P1 input is high while P2, P3, and P4 are low) with the help of switch S9, all the latches hold that ‘1’ and their decoded ‘b’ and ‘c’ segment outputs go high. However, the common-cathode drive is absent in all the 7-segment displays because driver transistors T4 through T11 are cut off due to the low outputs of all RS flip-flops and hence the displays are blank. At the same time, the low outputs of all RS flip-flops (1Q through 8Q) forward bias pnp transistors T12 through T19 associ- ated with LED1 through LED8 of each of the displays. As a result, all these LEDs glow, indicating no tripping. Now when unit E trips, output 5Q of RS flip-flop IC2 goes high to provide the base drive to common-cathode drive transistor T8. This, in turn, activates DIS5 (fifth from left in Fig. 2) to display ‘1’, indicating that unit E tripped first. The corresponding LED5 goes off as transistor T16 is cut off. Also, latch IC8 is disabled due to logic 1 on its pin 5 and therefore it does not respond to further changes in its BCD data input. Simultaneously, the buzzer goes on to sound an audible alarm, indicating the emergency situation at the plant. The differentiator formed by C5 and R6 responds to the low-to-high transition of 5Q and generates a short pulse. This pulse passes through diode D13 and transistors T2 and T3 and reaches clock pin of counter IC3. The counter counts up and its output becomes 0010 (decimal 2). Fig. 3: Actual-size, single-side PCB of the main control portion of tripping sequence controller-cum- indicator circuit Simple Projects 93 As mentioned earlier, all the display units other than E have the drive signal on segments a, b, g, e, and c now but are off because of the missing com- mon-cathode drive. When the next subunit H trips, output 8Q experiences a low-to-high transition and the corresponding display (DIS8) shows digit ‘2’. The above sequence of operation holds true for any further subunit tripping—with the displayed digit incrementing by one for each sequential tripping. In the prototype, LEDs D17 through D24 were fixed below the corresponding 7-segment displays pertaining to subunits A through H to provide a visual indication that these units are ready to re- spond to a tripping. The circuit works satisfactorily with twisted-pair wires of length up to 5 metres. In electrically noisy environments, the length of the cable has to be re- duced or a shielded twisted-pair cable can be used. An actual-size, single-side PCB layout for the main control portion of the tripping sequence re- corder-cum-indicator circuit is shown in Fig. 3 and its component layout in Fig. 4. The PCB layout for the indicator set comprising IC4, DIS1, transistors T4 and T12, LED1, etc is shown in Fig. 5 and its component layout in Fig. 6. The indicator set of Fig. 5 can be connected to the main PCB of Fig. 3 using Bergstrip type SIP (single-inline-pin) connectors as per requirements. This tripping sequence recorder-cum-indicator circuit can also be used in quiz games to decide the order in which the teams responded to a common question. For this, provide push-to-on switches on the tables of individual teams and a master reset to the quiz master. Modify the alarm circuit suit- ably with a retriggerable monostable stage so that the audible alarm stops after a short interval.
One major problem in using water as a conducting medium arises due to the process of electrolysis, since the sensor probes used for level detection are in contact with water and they get deteriorated over a period of time. This degradation occurs due to the deposition of ions on the probes, which are liber- ated during the process of electrolysis. Thereby, the conductivity of the probes decreases gradually and results in the malfunctioning of the system. This can be avoided by energising the probes using an AC source instead of a DC source. The circuit presented here incorporates the following features: 1. It monitors the reservoir (sump tank) on the ground floor and controls the pump motor by switching it ‘on’ when the sump tank level is sufficient and turning it ‘off ’ when the water in the sump tank reaches a minimum level. 2. Emergency switching on/off of the pump motor manually is feasible. 3. The pump motor is operated only if the mains voltage is within safe limits. This increases the life of the motor. Fig. 1: Circuit diagram of complete water level solution (contd. refer Fig. 2) LOKESH KUMATH Simple Projects 95 4. It keeps track of the level in the overhead tank (OHT) and switches on/off the motor, as required, automatically. 5. It checks the proper working of the motor by sensing the water flow into the tank. The motor is switched ‘on’ and ‘off ’ three times, with a delay of about 10 seconds, and if water is not flowing into the overhead tank due to any reason, such as air-lock inside the pipe, it warns the user by audio-visual means. 6. It gives visual and audio indications of all the events listed above. 7. An audio indication is given while the motor is running. 8. The system is electrolysis-proof. Description The power supply section (Fig. 1). It comprises a step-down transformer (with secondary voltage and current rating of 15V-0-15V, 1A respectively), followed by a bridge rectifier, filter, and 12-volt regulators [LM7812 for +12V (VCC) and LM7912 for –12V (VEE)]. Capacitors C1-C4, across rectifier diodes, and C8 and C10, across regulator output, function as noise eliminators. Diodes D5 and D6 are used as protection diodes. The under- and over-voltage cutoff section (Fig. 1). It comprises a dual comparator, two pnp transistors, and a few other discrete components. This part of the circuit is meant to stop the motor in case of a low mains voltage (typically 180V to 190V) or a voltage higher than a specified level (say 260V to 270V). The unregulated DC is sampled by means of a potential divider network comprising resistors R3 and R4. The sampled voltage is given to two comparators inside IC LM319. The reference voltages for these two comparators are set by presets VR1 and VR2. The outputs of both the comparators are active-low (normally high, until the low or high voltage limits are exceeded). That is, when the AC mains goes below (or rises above) the preset levels, the outputs of the comparators change to logic zero. The output of either comparator, when low, results in lighting up of the respective LED—D7 (for lower limit) and D8 (for upper limit) via transistors T1 and T2 (2N2907), which are switching transistors. The outputs from the comparators also go to 8-input NAND gate IC7 (CD4068) to control the motor via transistor T7. All inputs to IC7 are high when all conditions required for running of the pump motor are fulfilled. When one or more conditions are not met, the output of IC7 goes high to de-energise relay RL1 via transistor T7. Fig. 2: Part circuit of complete water level solution (contd. from Fig. 1) 96 Simple Projects Bipolar squarewave generation (Fig. 1). One side of the secondary of transformer X1 is also connected to opamp IC10 (μA 741), which is used here as a comparator to provide bipolar square wave (hav- ing positive and negative halves). It is not advised to directly connect the secondary output to the probe in the tanks because, if due to any reason the primary and secondary get shorted, there is a risk of shock, as the secondary would be directly connected to the probes immersed in water inside the tank. But if we use a comparator in between the secondary and probes, the IC would get open in case primary and secondary windings are short- circuited. For additional safety, fuses F2 and F3, both of 1A capac- ity, are connected to the output of secondary windings. Pump motor fault-detection cir- cuit (Figs 1 and 2). A sensor probe detects the flow of water. It is fixed just at the mouth of the inlet pipe, inside the overhead tank. When the motor is off (output ‘G’ of NAND gate IC7 is high), transistor T9 (2N222) is ‘on’ (saturated) and, there- fore, capacitor C15 is short-circuited. It also pulls the clock input pin 3 of IC4(a) flip-flop to ground. Zener D30 ensures that transistor T9 does not conduct with logic 0 voltage (1 to 2V) at its base. When the motor is running (all the inputs to NAND gate IC7 are high), transistor T9 base is pulled to ground and thus capacitor C15 starts charging via resistor R16. The RC combination is selected [using the well-known charging formula V(t) = Vfinal (1-e-t/RC)] such that it takes about 15 seconds for the capacitor to reach 1/3 Vcc, i.e. about 4 volts to clock flip-flop IC4(a) to toggle, taking its Q pin low to stop the motor (via IC7, transistor T7, and relay RL1). However, if water starts flowing within 15 seconds after the starting of motor, transistor T8 would start conducting and discharge capacitor C15, not allowing it to charge, irrespective of the state of transistor T9. Thus capacitor C15 remains discharged. But if water does not flow due to any reason, such as air lock or pump motor failure, IC4(a) toggles after about 15 seconds, which makes its Q pin 2 low. As a result, the output of IC 7 goes high and the motor stops. Simultane- Fig. 3. Actual-size, single-sided PCB layout for the circuit shown in Figs 1 and 2 Simple Projects 97 ously, capacitor C15 is discharged. At the instant Q goes low, Q (pin 1) goes high and so a clock is ap- plied to IC5 via resistor-capacitor combination of R18-C16, so that clock input pin 14 of IC5 goes high after about 10 seconds. As a result, pin 2 of IC5 goes high and resets IC4(a) to make Q high again. This starts the motor again. But if water still does not flow into the OHT this time, Q of IC4(a) becomes low again to switch off the motor. Simultane- ously, IC5 gets another clock pulse and IC4(a) is reset once again after 10 seconds to restart the motor. If this condition repeats for the third time, pin 7 of IC5 goes high, to reset it. The same output from pin 7 of IC5 functions as a clock pulse for IC4(b), to give a logic high signal to RE SET pin 4 of IC9 (NE555), configured as astable multiviberator. The output of IC9 is used to switch ‘on’ the speaker at the set frequency. The frequency (tone) can be set using preset VR4. The Q out- put of IC4(b) is also used to light up the ‘Motor Fault’ LED D27. This fault condition can be reset by pressing switch S2 to reset IC4(a) and IC 4(b), after taking appropriate remedial action such as filling the foot-valve of the motor with water or by removing the air-lock inside the pipe. Reservoir/sump tank level de- tection (Fig. 2). To start the motor when the water level in the reservoir is sufficient (level B), and to stop the motor when the level falls below a particular level (level A), are the two functions performed by this section. IC6 (timer NE555) is con- figured here to function in the bistable mode of operation. When the water level is below the minimum level A, both pins 2 and 6 of IC6 are low. In this state, the output is high, as the internal R-S flipflop is in the set condition. When water rises up to level A and above, but below level B, pin 2 is at high level. But in this state no change occurs at the output because both the inputs to the flip-flop are at logic zero, and so the initial condition remains at the output.
D.K. Kaushik